Business Wire

SiFive To Introduce New RISC-V Processor Architecture and RISC-V PC at Linley Fall Virtual Processor Conference

SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...
VentureBeat

SiFive unveils 2 processor cores for performance applications

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More SiFive, a processor design company pursuing the open hardware model of ...
Forbes

SiFive Is Leading The Way For Innovation On RISC-V

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
insideHPC

The Role of Middleware in Optimizing Vector Processing

A new whitepaper from NEC X delves into the world of unstructured data and explores how vector processors and their optimization software can help solve the challenges of wrangling the ever-growing ...
Ars Technica

SiFive’s brand-new P550 is one of the world’s fastest RISC-V CPUs

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...
EDN

Embedded vector processor runs software-defined radio

The latest mobile phones already provide multi-band and multi-mode operation on cellular networks. They use an increasing number of different communication pipes for WiFi connections, digital TV, ...
Ars Technica

SIMD vs Stream vs Vector processors

When there is talked about modern CPUs and GPUs the terms SIMD processor, Stream processor and Vector processor often pops up. I have been trying to figure out how these terms relate but its unclear ...
Network World

Cray to unite scalar, vector computer architectures

Cray plans to create a new supercomputing platform combining four types of processing capability in a blade server architecture. Cray Inc. plans to create a new supercomputing platform combining four ...
EDN

AI is stress-testing processor architectures and RISC-V fits the moment

RISC-V’s expanding role in AI is not a rejection of incumbent architectures, which continue to deliver performance and ...
The Next Platform

Hadoop And Spark Get A Vector Performance Boost

Ever since the “Aurora” vector processor designed by NEC was launched last year, we have been wondering if it might be used as a tool to accelerate workloads other than the traditional HPC simulation ...
Semiconductor Engineering

Multi-Core Architecture Optimized For Time-Predictable Neural Network Inference (FZI, KIT)

A new technical paper titled “MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference” was published by researchers at FZI Research Center for Information ...